Feuille de cuivre<\/td> Formation d'une couche conductrice<\/td> 1\/2 oz \u00e0 3 oz (18 \u00e0 105 \u03bcm)<\/td> Feuille trait\u00e9e \u00e0 l'envers, feuille \u00e0 profil bas<\/td><\/tr><\/tbody><\/table><\/figure><\/span>Consid\u00e9rations relatives \u00e0 la s\u00e9lection des mat\u00e9riaux<\/span><\/h3>Temp\u00e9rature de transition vitreuse (Tg)<\/strong>: La norme FR-4 est de 130-140 \u00b0C, tandis que les mat\u00e9riaux \u00e0 haute Tg peuvent atteindre 170-180 \u00b0C.<\/li>\n\nConstante di\u00e9lectrique (Dk)<\/strong>: Les circuits \u00e0 grande vitesse n\u00e9cessitent des mat\u00e9riaux \u00e0 faible Dk (3.0-3.5).<\/li>\n\nFacteur de dissipation (Df)<\/strong>: Les applications \u00e0 haute fr\u00e9quence n\u00e9cessitent un Df < ; 0,005.<\/li>\n\nCoefficient de dilatation thermique (CTE)<\/strong>: Le coefficient de dilatation thermique (CTE) de l'axe Z doit \u00eatre inf\u00e9rieur \u00e0 50 ppm\/\u00b0C afin d'\u00e9viter toute fissuration des vias.<\/li><\/ul><\/span>Flux d\u00e9taill\u00e9 du processus de lamination<\/span><\/h2><\/span>1. Phase de pr\u00e9traitement<\/span><\/h3>Pr\u00e9paration du mat\u00e9riel<\/strong>V\u00e9rifier les mod\u00e8les de mat\u00e9riaux et les num\u00e9ros de lots, mesurer la teneur en r\u00e9sine et le d\u00e9bit.<\/li>\n\nTraitement de la couche int\u00e9rieure<\/strong>: Oxyder pour augmenter la rugosit\u00e9 de la surface et am\u00e9liorer l'adh\u00e9rence.<\/li>\n\nStack-Up Design<\/strong>: Respecter les principes de sym\u00e9trie afin d'\u00e9viter les d\u00e9formations dues \u00e0 une inad\u00e9quation de l'ECU.<\/li><\/ul><\/span>2.Empilage et alignement<\/span><\/h3>Syst\u00e8me d'alignement<\/strong>: Utilisez des trous \u00e0 quatre fentes (+0,1 mm de tol\u00e9rance) ou des syst\u00e8mes d'alignement par rayons X (pr\u00e9cision \u00b115 \u03bcm).<\/li>\n\nS\u00e9quence d'empilage<\/strong>: Structure typique \u00e0 8 couches : feuille de cuivre-PP-noyau-PP-noyau-PP-feuille de cuivre.<\/li><\/ul><\/span>3.Contr\u00f4le des param\u00e8tres du cycle de lamination<\/span><\/h3>Param\u00e8tres<\/th> Plage de contr\u00f4le<\/th> Impact<\/th><\/tr><\/thead> Taux de chauffage<\/td> 2-3 \u00b0C\/min<\/td> Une vitesse trop \u00e9lev\u00e9e entra\u00eene un durcissement in\u00e9gal de la r\u00e9sine ; une vitesse trop faible r\u00e9duit l'efficacit\u00e9.<\/td><\/tr> Temp\u00e9rature de lamination<\/td> 180-200 \u00b0C<\/td> Une valeur trop \u00e9lev\u00e9e d\u00e9grade la r\u00e9sine ; une valeur trop faible entra\u00eene un durcissement incomplet.<\/td><\/tr> Application de la pression<\/td> 200-350 PSI<\/td> Une valeur trop \u00e9lev\u00e9e entra\u00eene un \u00e9coulement excessif de la r\u00e9sine ; une valeur trop faible r\u00e9duit l'adh\u00e9rence.<\/td><\/tr> Niveau de vide<\/td> \u2264 50 mbar<\/td> \u00c9limine les substances volatiles et l'air r\u00e9siduel.<\/td><\/tr> Temps de s\u00e9chage<\/td> 60-120 min<\/td> Assure une r\u00e9ticulation compl\u00e8te de la r\u00e9sine.<\/td><\/tr><\/tbody><\/table><\/figure><\/span>4.Post-polym\u00e9risation et refroidissement<\/span><\/h3>Refroidissement par \u00e9tapes<\/strong>: Contr\u00f4ler la vitesse de refroidissement (1 \u00e0 2 \u00b0C\/min) afin de r\u00e9duire les contraintes internes.<\/li>\n\nSoulagement du stress<\/strong>: Maintenir la temp\u00e9rature en dessous de Tg pendant un certain temps afin de r\u00e9duire les contraintes r\u00e9siduelles.<\/li><\/ul>Circuit imprim\u00e9 multicouche<\/figcaption><\/figure><\/div><\/span>Analyse et contre-mesures pour les d\u00e9fauts de laminage courants<\/span><\/h2><\/span>D\u00e9collement et vides<\/span><\/h3>Causes<\/strong>Flux de r\u00e9sine insuffisant, volatiles r\u00e9siduels, contamination du mat\u00e9riau.<\/li>\n\nSolutions<\/strong>Optimisation de la courbe de chauffe, ajout d'une \u00e9tape de d\u00e9gazage sous vide et contr\u00f4le strict de l'humidit\u00e9 ambiante (<40% RH).<\/li><\/ul><\/span>D\u00e9formation<\/span><\/h3>Causes<\/strong>Inad\u00e9quation du CTE, pression in\u00e9gale, vitesse de refroidissement excessive.<\/li>\n\nSolutions<\/strong>Adopter une conception sym\u00e9trique, optimiser la distribution de la pression et contr\u00f4ler le taux de refroidissement.<\/li><\/ul><\/span>D\u00e9faut de r\u00e9sine et exposition du tissu de verre<\/span><\/h3>Causes<\/strong>D\u00e9bit de r\u00e9sine excessif, pression excessive.<\/li>\n\nSolutions<\/strong>Choisir un PP \u00e0 faible d\u00e9bit, optimiser la courbe de pression, utiliser des barres de barrage.<\/li><\/ul><\/span>Technologies avanc\u00e9es de lamination<\/span><\/h2><\/span>Lamination assist\u00e9e par le vide<\/span><\/h3>La technologie de stratification assist\u00e9e sous vide am\u00e9liore consid\u00e9rablement la qualit\u00e9 de la liaison entre les couches des circuits imprim\u00e9s multicouches en effectuant le processus dans un environnement sous vide complet (\u2264 5 mbar). Cette technique \u00e9limine efficacement l'air et les substances volatiles entre les couches pendant le pressage, r\u00e9duisant ainsi le taux de d\u00e9fauts caus\u00e9s par les bulles de 5 \u00e0 8 % dans les proc\u00e9d\u00e9s traditionnels \u00e0 moins de 1 %.Elle est particuli\u00e8rement adapt\u00e9e \u00e0 la fabrication de cartes haute fr\u00e9quence et de cartes en cuivre \u00e9pais, car celles-ci exigent une coh\u00e9rence extr\u00eamement \u00e9lev\u00e9e en termes de propri\u00e9t\u00e9s di\u00e9lectriques et de conductivit\u00e9 thermique entre les couches. L'environnement sous vide garantit que la r\u00e9sine remplit enti\u00e8rement les espaces entre les circuits pendant la phase d'\u00e9coulement, formant une couche di\u00e9lectrique uniforme qui r\u00e9duit les pertes de transmission des signaux haute fr\u00e9quence de 15 \u00e0 20 %.Dans les applications \u00e0 cuivre \u00e9pais (\u2265 3 oz), l'assistance sous vide emp\u00eache efficacement le d\u00e9laminage caus\u00e9 par les irr\u00e9gularit\u00e9s de la feuille de cuivre, augmentant la r\u00e9sistance au pelage intercouche \u00e0 plus de 1,8 N\/mm. Les \u00e9quipements modernes de laminage sous vide int\u00e8grent \u00e9galement des syst\u00e8mes de d\u00e9tection de pression en temps r\u00e9el, avec une surveillance \u00e0 128 points, garantissant une uniformit\u00e9 de pression de \u00b1 5 %, ce qui am\u00e9liore consid\u00e9rablement la coh\u00e9rence de la production.<\/p>
<\/span>Technologie de lamination s\u00e9quentielle<\/span><\/h3>La technologie de stratification s\u00e9quentielle permet la fabrication de cartes multicouches tr\u00e8s complexes gr\u00e2ce \u00e0 plusieurs \u00e9tapes de pressage. Ce processus consiste d'abord \u00e0 stratifier les couches centrales internes avec du pr\u00e9impr\u00e9gn\u00e9 partiel pour former des sous-modules, puis \u00e0 proc\u00e9der au per\u00e7age, au placage et \u00e0 d'autres processus pour \u00e9tablir les interconnexions. Enfin, les couches restantes sont ajout\u00e9es lors d'une deuxi\u00e8me stratification.Cette approche \u00e9tape par \u00e9tape permet d'int\u00e9grer des composants passifs (tels que des r\u00e9sistances et des condensateurs) et des couches fonctionnelles sp\u00e9ciales (par exemple, des substrats m\u00e9talliques thermoconducteurs) entre les couches, ce qui permet l'int\u00e9gration de syst\u00e8mes dans des bo\u00eetiers. Dans la production de circuits imprim\u00e9s haut de gamme comportant 16 couches ou plus, le laminage s\u00e9quentiel contr\u00f4le la pr\u00e9cision d'alignement entre les couches \u00e0 \u00b125 \u00b5m tout en \u00e9vitant les contraintes cumul\u00e9es g\u00e9n\u00e9r\u00e9es par le pressage en une seule \u00e9tape.De plus, cette technologie prend en charge les structures di\u00e9lectriques hybrides, par exemple en utilisant des mat\u00e9riaux \u00e0 faibles pertes (tels que le polyimide modifi\u00e9) pour les couches de signaux \u00e0 haute vitesse et des mat\u00e9riaux hautement thermoconducteurs pour les couches d'alimentation, ce qui r\u00e9duit la perte d'insertion pour les signaux \u00e0 haute vitesse de 56 Gbps de 0,8 dB\/cm.Bien que le cycle de production augmente de 30 %, le rendement s'am\u00e9liore pour atteindre 98,5 %, ce qui le rend particuli\u00e8rement adapt\u00e9 aux circuits imprim\u00e9s utilis\u00e9s dans les \u00e9quipements de communication 5G et les serveurs haut de gamme.<\/p>
<\/span>Proc\u00e9d\u00e9 de pelliculage \u00e0 basse temp\u00e9rature<\/span><\/h3>Le processus de stratification \u00e0 basse temp\u00e9rature utilise des syst\u00e8mes de r\u00e9sine sp\u00e9cialement modifi\u00e9s pour r\u00e9aliser la stratification \u00e0 des temp\u00e9ratures r\u00e9duites de 130 \u00e0 150 \u00b0C, soit 40 \u00e0 50 \u00b0C de moins que les m\u00e9thodes conventionnelles. Gr\u00e2ce \u00e0 la conception mol\u00e9culaire des r\u00e9sines \u00e9poxy et \u00e0 l'optimisation des syst\u00e8mes catalytiques, la r\u00e9sine atteint une r\u00e9ticulation compl\u00e8te \u00e0 des temp\u00e9ratures plus basses tout en conservant une valeur Tg \u2265 160 \u00b0C.Le principal avantage est une r\u00e9duction significative des contraintes thermiques sur les composants sensibles, ce qui \u00e9vite la d\u00e9formation des mat\u00e9riaux et la d\u00e9gradation des performances caus\u00e9es par les temp\u00e9ratures \u00e9lev\u00e9es.Dans la fabrication de circuits imprim\u00e9s flexibles et de circuits imprim\u00e9s rigides-flexibles, le laminage \u00e0 basse temp\u00e9rature contr\u00f4le le retrait des substrats en polyimide \u00e0 moins de 0,05 % et r\u00e9duit le d\u00e9salignement des circuits \u00e0 \u00b115 \u00b5m. De plus, ce proc\u00e9d\u00e9 r\u00e9duit consid\u00e9rablement la consommation d'\u00e9nergie (plus de 30 %) et les \u00e9missions de CO\u2082, ce qui r\u00e9pond aux exigences de fabrication \u00e9cologique.Les derni\u00e8res avanc\u00e9es concernent les r\u00e9sines \u00e0 basse temp\u00e9rature enrichies en nano-charges (par exemple, incorporant des nanoparticules de silice), qui r\u00e9duisent le coefficient de dilatation thermique (CTE) intercouche \u00e0 35 ppm\/\u00b0C, r\u00e9pondant ainsi aux exigences de fiabilit\u00e9 de l'\u00e9lectronique automobile dans des environnements allant de -40 \u00b0C \u00e0 150 \u00b0C.<\/p>
<\/span>Contr\u00f4le de la qualit\u00e9 et inspection<\/span><\/h2><\/span>Essais destructifs<\/span><\/h3>Analyse de la microsection<\/strong>: V\u00e9rifie l'adh\u00e9rence entre les couches, le remplissage de la r\u00e9sine et la qualit\u00e9 de la paroi du trou.<\/li>\n\nTest de r\u00e9sistance au pelage<\/strong>: \u00c9value l'adh\u00e9rence entre la feuille de cuivre et le substrat (exigence standard \u2265 1,0 N\/mm).<\/li>\n\nEssai de contrainte thermique<\/strong>: Immersion dans une soudure \u00e0 288 \u00b0C pendant 10 secondes pour v\u00e9rifier l'absence de d\u00e9lamination.<\/li><\/ul><\/span>Essais non destructifs<\/span><\/h3>Balayage ultrasonique<\/strong>: D\u00e9tecte les vides internes et les d\u00e9fauts de d\u00e9lamination.<\/li>\n\nInspection par rayons X<\/strong>\u00c9value la pr\u00e9cision de l'alignement entre les couches et le positionnement des composants int\u00e9gr\u00e9s.<\/li>\n\nTest de rigidit\u00e9 di\u00e9lectrique<\/strong>: V\u00e9rifie la performance de l'isolation entre les couches.<\/li><\/ul><\/span>Tendances des proc\u00e9d\u00e9s de pelliculage<\/span><\/h2>Innovation mat\u00e9rielle<\/strong>R\u00e9sines modifi\u00e9es remplies de nanoparticules, mat\u00e9riaux haute fr\u00e9quence \u00e0 faible perte, substrats sans halog\u00e8ne respectueux de l'environnement.<\/li>\n\nRaffinement du processus<\/strong>: Surveillance de la pression et de la temp\u00e9rature en temps r\u00e9el, optimisation des param\u00e8tres par l'IA, technologie de jumelage num\u00e9rique.<\/li>\n\nRenseignements sur les \u00e9quipements<\/strong>: R\u00e9seaux de capteurs int\u00e9gr\u00e9s, syst\u00e8mes de contr\u00f4le adaptatifs, t\u00e9l\u00e9diagnostic et maintenance.<\/li>\n\nD\u00e9veloppement durable<\/strong>: R\u00e9duire la consommation d'\u00e9nergie de plus de 30 %, minimiser les \u00e9missions de COV et am\u00e9liorer l'utilisation des mat\u00e9riaux.<\/li><\/ol><\/span>Exigences sp\u00e9cifiques \u00e0 l'application<\/span><\/h2>Champ d'application<\/th> Exigences particuli\u00e8res en mati\u00e8re de pelliculage<\/th> Solution de pelliculage typique<\/th><\/tr><\/thead> \u00c9lectronique automobile<\/td> Grande fiabilit\u00e9, r\u00e9sistance aux cycles thermiques<\/td> Mat\u00e9riaux \u00e0 haute teneur en Tg, syst\u00e8mes de r\u00e9sine am\u00e9lior\u00e9s<\/td><\/tr> Communication 5G<\/td> Faible perte, Dk\/Df stable<\/td> Mat\u00e9riaux sp\u00e9ciaux \u00e0 haute fr\u00e9quence, contr\u00f4le strict de la teneur en r\u00e9sine<\/td><\/tr> A\u00e9rospatiale<\/td> Adaptabilit\u00e9 aux environnements extr\u00eames<\/td> Substrats de polyimide, proc\u00e9d\u00e9s de laminage \u00e0 haute temp\u00e9rature<\/td><\/tr> \u00c9lectronique grand public<\/td> Minceur, haute densit\u00e9<\/td> Noyaux ultrafins, contr\u00f4le pr\u00e9cis de la r\u00e9sine<\/td><\/tr><\/tbody><\/table><\/figure><\/span>Conclusion<\/span><\/h2>Le processus de laminage des circuits imprim\u00e9s, en tant qu'\u00e9tape centrale de la fabrication des circuits imprim\u00e9s multicouches, d\u00e9termine directement les performances et la fiabilit\u00e9 du produit final. Alors que les appareils \u00e9lectroniques \u00e9voluent vers des fr\u00e9quences, des vitesses et des densit\u00e9s plus \u00e9lev\u00e9es, la technologie du laminage progresse vers plus de pr\u00e9cision, d'intelligence et de respect de l'environnement. La ma\u00eetrise des principes, des mat\u00e9riaux et du contr\u00f4le des param\u00e8tres de la stratification est cruciale pour la conception des circuits imprim\u00e9s et la fabrication de haute qualit\u00e9.<\/p>","protected":false},"excerpt":{"rendered":"
Analyse du processus de stratification des circuits imprim\u00e9s : Une technologie de base dans la fabrication de circuits imprim\u00e9s multicouches Ce document pr\u00e9sente un examen d\u00e9taill\u00e9 du syst\u00e8me de mat\u00e9riaux de stratification, du d\u00e9roulement du processus, du contr\u00f4le des param\u00e8tres et des m\u00e9thodes de contr\u00f4le de la qualit\u00e9. Il explore des techniques avanc\u00e9es telles que la stratification assist\u00e9e par le vide et la stratification s\u00e9quentielle, tout en soulignant les tendances futures en mati\u00e8re de d\u00e9veloppement des processus de stratification.<\/p>","protected":false},"author":1,"featured_media":3964,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[112],"tags":[363],"class_list":["post-4213","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-knowledge","tag-pcb-laminating-process"],"yoast_head":"\n
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