{"id":6045,"date":"2026-08-05T09:00:00","date_gmt":"2026-08-05T01:00:00","guid":{"rendered":"https:\/\/www.topfastpcb.com\/?p=6045"},"modified":"2026-08-04T22:42:02","modified_gmt":"2026-08-04T14:42:02","slug":"essential-high-speed-pcb-routing-techniques","status":"publish","type":"post","link":"https:\/\/www.topfastpcb.com\/sv\/blog\/essential-high-speed-pcb-routing-techniques\/","title":{"rendered":"Viktiga tekniker f\u00f6r h\u00f6ghastighetsfr\u00e4sning av kretskort f\u00f6r PCIe 5.0 och DDR5"},"content":{"rendered":"<div id=\"ez-toc-container\" class=\"ez-toc-v2_0_74 counter-hierarchy ez-toc-counter ez-toc-custom ez-toc-container-direction\">\n<div class=\"ez-toc-title-container\">\n<p class=\"ez-toc-title\" style=\"cursor:inherit\">Inneh\u00e5llsf\u00f6rteckning<\/p>\n<span class=\"ez-toc-title-toggle\"><\/span><\/div>\n<nav><ul class='ez-toc-list ez-toc-list-level-1' ><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-1\" href=\"https:\/\/www.topfastpcb.com\/sv\/blog\/essential-high-speed-pcb-routing-techniques\/#The_Challenge_of_Multi-Gigabit_Routing_in_Modern_Hardware\" >Utmaningen med multi-gigabit-routing i modern h\u00e5rdvara<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-2\" href=\"https:\/\/www.topfastpcb.com\/sv\/blog\/essential-high-speed-pcb-routing-techniques\/#The_Three_Pillars_of_Signal_Integrity\" >Signalintegritetens tre pelare<\/a><ul class='ez-toc-list-level-3' ><li class='ez-toc-heading-level-3'><a class=\"ez-toc-link ez-toc-heading-3\" href=\"https:\/\/www.topfastpcb.com\/sv\/blog\/essential-high-speed-pcb-routing-techniques\/#Strict_Impedance_Control\" >Strikt impedanskontroll<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-3'><a class=\"ez-toc-link ez-toc-heading-4\" href=\"https:\/\/www.topfastpcb.com\/sv\/blog\/essential-high-speed-pcb-routing-techniques\/#Dielectric_and_Copper_Losses\" >Dielektriska f\u00f6rluster och kopparf\u00f6rluster<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-3'><a class=\"ez-toc-link ez-toc-heading-5\" href=\"https:\/\/www.topfastpcb.com\/sv\/blog\/essential-high-speed-pcb-routing-techniques\/#Crosstalk_and_Return_Paths\" >\u00d6verh\u00f6rning och returv\u00e4gar<\/a><\/li><\/ul><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-6\" href=\"https:\/\/www.topfastpcb.com\/sv\/blog\/essential-high-speed-pcb-routing-techniques\/#How_to_Route_High_Speed_Signals_Step-by-Step_Guidelines\" >Hur man drar h\u00f6ghastighetssignaler (steg-f\u00f6r-steg-anvisningar)<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-7\" href=\"https:\/\/www.topfastpcb.com\/sv\/blog\/essential-high-speed-pcb-routing-techniques\/#Material_Selection_for_PCIe_50_and_DDR5\" >Materialval f\u00f6r PCIe 5.0 och DDR5<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-8\" href=\"https:\/\/www.topfastpcb.com\/sv\/blog\/essential-high-speed-pcb-routing-techniques\/#Understanding_the_Eye_Diagram\" >Att f\u00f6rst\u00e5 \u00f6gondiagrammet<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-9\" href=\"https:\/\/www.topfastpcb.com\/sv\/blog\/essential-high-speed-pcb-routing-techniques\/#Frequently_Asked_Questions_FAQ\" >Ofta st\u00e4llda fr\u00e5gor (FAQ)<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-10\" href=\"https:\/\/www.topfastpcb.com\/sv\/blog\/essential-high-speed-pcb-routing-techniques\/#Conclusion\" >Slutsats<\/a><\/li><\/ul><\/nav><\/div>\n<h2><span class=\"ez-toc-section\" id=\"The_Challenge_of_Multi-Gigabit_Routing_in_Modern_Hardware\"><\/span>Utmaningen med multi-gigabit-routing i modern h\u00e5rdvara<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Vi har officiellt g\u00e5tt in i en era d\u00e4r digital design i grunden \u00e4r analog. I och med inf\u00f6randet av gr\u00e4nssnitt med hastigheter p\u00e5 flera gigabit, s\u00e5som PCIe 5.0 (32 GT\/s) och DDR5 (upp till 8400 MT\/s), beter sig signalerna inte l\u00e4ngre som enkla bin\u00e4ra tillst\u00e5nd. Ist\u00e4llet fortplantar de sig som komplexa elektromagnetiska v\u00e5gor, vilket g\u00f6r dem extremt k\u00e4nsliga f\u00f6r kretskortets fysiska geometri.<\/p>\n<p>Vid dessa extrema frekvenser kan varje via, varje b\u00f6j i en ledningsbana och varje liten variation i det dielektriska materialets tjocklek utg\u00f6ra en potentiell k\u00e4lla till signalf\u00f6rs\u00e4mring. I denna tekniska f\u00f6rdjupning ska vi unders\u00f6ka <strong>Tekniker f\u00f6r h\u00f6ghastighetsfr\u00e4sning av kretskort<\/strong> kr\u00e4vs f\u00f6r att uppr\u00e4tth\u00e5lla signalintegriteten (SI), bevara ett \u00f6ppet \u00f6gondiagram och s\u00e4kerst\u00e4lla att dina banbrytande konstruktioner startar upp felfritt redan vid f\u00f6rsta f\u00f6rs\u00f6ket.<\/p>\n<div style=\"text-align: center;\"><img loading=\"lazy\" decoding=\"async\" src=\"https:\/\/www.topfastpcb.com\/wp-content\/uploads\/2026\/08\/Essential-High-Speed-PCB-Routing-Techniques.jpg\" alt=\"Grundl\u00e4ggande tekniker f\u00f6r h\u00f6ghastighetsfr\u00e4sning av kretskort\" width=\"600\" height=\"304\" class=\"aligncenter size-full wp-image-6292\" srcset=\"https:\/\/www.topfastpcb.com\/wp-content\/uploads\/2026\/08\/Essential-High-Speed-PCB-Routing-Techniques.jpg 600w, https:\/\/www.topfastpcb.com\/wp-content\/uploads\/2026\/08\/Essential-High-Speed-PCB-Routing-Techniques-300x152.jpg 300w, https:\/\/www.topfastpcb.com\/wp-content\/uploads\/2026\/08\/Essential-High-Speed-PCB-Routing-Techniques-18x9.jpg 18w\" sizes=\"auto, (max-width: 600px) 100vw, 600px\" \/><\/div>\n<h2><span class=\"ez-toc-section\" id=\"The_Three_Pillars_of_Signal_Integrity\"><\/span>Signalintegritetens tre pelare<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Innan man drar en enda ledning kr\u00e4ver h\u00f6ghastighetsrouting en felfri grund. Signalintegriteten vid hastigheter p\u00e5 flera gigabit vilar p\u00e5 tre huvudsakliga pelare: impedanskontroll, minimering av f\u00f6rluster och d\u00e4mpning av \u00f6verh\u00f6rning.<\/p>\n<div style=\"text-align: center;\"><img loading=\"lazy\" decoding=\"async\" src=\"https:\/\/www.topfastpcb.com\/wp-content\/uploads\/2026\/08\/Essential-High-Speed-PCB-Routing-Techniques-1.jpg\" alt=\"Grundl\u00e4ggande tekniker f\u00f6r h\u00f6ghastighetsfr\u00e4sning av kretskort\" width=\"600\" height=\"293\" class=\"aligncenter size-full wp-image-6293\" srcset=\"https:\/\/www.topfastpcb.com\/wp-content\/uploads\/2026\/08\/Essential-High-Speed-PCB-Routing-Techniques-1.jpg 600w, https:\/\/www.topfastpcb.com\/wp-content\/uploads\/2026\/08\/Essential-High-Speed-PCB-Routing-Techniques-1-300x147.jpg 300w, https:\/\/www.topfastpcb.com\/wp-content\/uploads\/2026\/08\/Essential-High-Speed-PCB-Routing-Techniques-1-18x9.jpg 18w\" sizes=\"auto, (max-width: 600px) 100vw, 600px\" \/><\/div>\n<h3><span class=\"ez-toc-section\" id=\"Strict_Impedance_Control\"><\/span>Strikt impedanskontroll<span class=\"ez-toc-section-end\"><\/span><\/h3>\n<p>F\u00f6r PCIe 5.0 ligger m\u00e5let f\u00f6r differentiell impedans vanligtvis p\u00e5 85 ohm (\u00b110%), medan m\u00e5let f\u00f6r DDR5-signaler med enkelpolig anslutning ligger p\u00e5 40\u201350 ohm beroende p\u00e5 den specifika JEDEC-standarden. Impedansen best\u00e4ms av ledningsbredden, avst\u00e5ndet mellan ledningarna och avst\u00e5ndet till referensplanet. \u00c4ven sm\u00e5 tillverkningsavvikelser \u2013 s\u00e5som \u00f6veretsning av kopparn \u2013 kan orsaka impedansavvikelser, vilket leder till signalreflektioner (returf\u00f6rlust).<\/p>\n<h3><span class=\"ez-toc-section\" id=\"Dielectric_and_Copper_Losses\"><\/span>Dielektriska f\u00f6rluster och kopparf\u00f6rluster<span class=\"ez-toc-section-end\"><\/span><\/h3>\n<p>Vid 16 GHz (Nyquistfrekvensen f\u00f6r PCIe 5.0) absorberar f\u00f6rlusttangenten (Df) i ditt kretskortsmaterial en betydande del av signalenergin och omvandlar den till v\u00e4rme. Dessutom tvingar \u201dskineffekten\u201d h\u00f6gfrekventa str\u00f6mmar att endast f\u00e4rdas i de yttersta mikrometrarna av kopparsp\u00e5ret. Oj\u00e4mna kopparytor \u00f6kar detta motst\u00e5nd dramatiskt, vilket kraftigt d\u00e4mpar signalen \u00f6ver avst\u00e5nd.<\/p>\n<h3><span class=\"ez-toc-section\" id=\"Crosstalk_and_Return_Paths\"><\/span>\u00d6verh\u00f6rning och returv\u00e4gar<span class=\"ez-toc-section-end\"><\/span><\/h3>\n<p>N\u00e4r h\u00f6ghastighetsledningar l\u00f6per parallellt under en alltf\u00f6r l\u00e5ng str\u00e4cka orsakar elektromagnetisk koppling brus (korsst\u00f6rning) i angr\u00e4nsande ledningar. Lika viktigt \u00e4r returv\u00e4gen: h\u00f6gfrekventa signaler v\u00e4ljer alltid den v\u00e4g som har l\u00e4gst induktans, vilket \u00e4r direkt under ledningen p\u00e5 det n\u00e4rmaste referensplanet. Om det planet bryts av en delning eller ett h\u00e5l kommer signalen att avge elektromagnetisk st\u00f6rning (EMI) och f\u00f6rs\u00e4mras avsev\u00e4rt.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"How_to_Route_High_Speed_Signals_Step-by-Step_Guidelines\"><\/span>Hur man drar h\u00f6ghastighetssignaler (steg-f\u00f6r-steg-anvisningar)<span class=\"ez-toc-section-end\"><\/span><\/h2><div class=\"schema-how-to wp-block-yoast-how-to-block\"><p class=\"schema-how-to-description\">F\u00f6lj dessa tekniska riktlinjer.<\/p> <ol class=\"schema-how-to-steps\"><li class=\"schema-how-to-step\" id=\"how-to-step-1\"><strong class=\"schema-how-to-step-name\">S\u00e4kerst\u00e4ll ett oavbrutet referensplan<\/strong> <p class=\"schema-how-to-step-text\">Leda aldrig en h\u00f6ghastighetssignal \u00f6ver en delning i jord- eller str\u00f6mplanet. Ledningen m\u00e5ste ha ett kontinuerligt, obrutet referensplan direkt under sig \u00f6ver hela sin l\u00e4ngd f\u00f6r att uppr\u00e4tth\u00e5lla en t\u00e4t returstr\u00f6msslinga. Om en signal m\u00e5ste byta skikt, se till att en jord\u00f6verf\u00f6ringsvia (stitching via) placeras precis intill signalvian f\u00f6r att s\u00e4kerst\u00e4lla en kontinuerlig returv\u00e4g.<\/p> <\/li><li class=\"schema-how-to-step\" id=\"how-to-step-2\"><strong class=\"schema-how-to-step-name\">Optimera differentialpar<\/strong> <p class=\"schema-how-to-step-text\">Dra differentialpar t\u00e4tt ihop och helt symmetriskt. Om ett hinder (t.ex. en via eller en komponent) tvingar paret att separeras, se till att f\u00f6ra dem samman igen s\u00e5 snabbt som m\u00f6jligt. Uppr\u00e4tth\u00e5ll fasmatchning (l\u00e4ngdmatching inom paret) med en tolerans p\u00e5 mindre \u00e4n 5 mil. Varje avvikelse i l\u00e4ngd leder till tidsf\u00f6rskjutning, vilket omvandlar differentiella signaler till common-mode-brus.<\/p> <\/li><li class=\"schema-how-to-step\" id=\"how-to-step-3\"><strong class=\"schema-how-to-step-name\">V\u00e4lj mellan mikrostrip och stripline<\/strong> <p class=\"schema-how-to-step-text\">Mikrostrip (ytlager): H\u00f6gre utbredningshastighet, men st\u00f6rre k\u00e4nslighet f\u00f6r str\u00e5lning och \u00f6verh\u00f6rning. L\u00e4mplig f\u00f6r kortare ledningar.<br\/>Stripline (interna lager): Ledningen \u00e4r placerad mellan tv\u00e5 jord- respektive str\u00f6mplan. Ger utm\u00e4rkt EMI-sk\u00e4rmning och minskar \u00f6verh\u00f6rning. F\u00f6r signaler p\u00e5 flera gigabit, s\u00e5som PCIe 5.0, rekommenderas starkt att anv\u00e4nda intern stripline-dragning.<\/p> <\/li><li class=\"schema-how-to-step\" id=\"how-to-step-4\"><strong class=\"schema-how-to-step-name\">Till\u00e4mpa 3W\/5W-regeln<\/strong> <p class=\"schema-how-to-step-text\">F\u00f6r att minska \u00f6verh\u00f6rning b\u00f6r man h\u00e5lla ett avst\u00e5nd p\u00e5 minst 3 g\u00e5nger ledningsbredden (3W) mellan intilliggande h\u00f6ghastighetsledningar av enkelriktad typ. F\u00f6r kritiska differentialpar som PCIe 5.0 b\u00f6r avst\u00e5ndet till angr\u00e4nsande signaler vara 5W f\u00f6r att f\u00f6rhindra n\u00e4r- och fj\u00e4rr\u00e4ndskorsst\u00f6rning (NEXT och FEXT).<\/p> <\/li><li class=\"schema-how-to-step\" id=\"how-to-step-5\"><strong class=\"schema-how-to-step-name\">Undvik 90-gradersb\u00f6jar<\/strong> <p class=\"schema-how-to-step-text\">Skarpa h\u00f6rn medf\u00f6r en pl\u00f6tslig f\u00f6r\u00e4ndring av ledningskapacitansen, vilket orsakar impedansavbrott. Anv\u00e4nd mjuka b\u00e5gar eller 45-graders fasade b\u00f6jar vid all h\u00f6ghastighetsdragning.<\/p> <\/li><li class=\"schema-how-to-step\" id=\"how-to-step-6\"><strong class=\"schema-how-to-step-name\">Hantera via stubbar genom bakborrning<\/strong> <p class=\"schema-how-to-step-text\">N\u00e4r en signal \u00f6verg\u00e5r fr\u00e5n lager 1 till lager 3 p\u00e5 ett kretskort med 10 lager fungerar den kvarvarande kopparbanan fr\u00e5n lager 3 till lager 10 som en antenn. Detta skapar en resonansstub som fullst\u00e4ndigt f\u00f6rst\u00f6r signaler p\u00e5 flera gigabit genom att orsaka djupa dippar i frekvenssvaret. Du m\u00e5ste ange <strong>\u00e5terborrning<\/strong> (borrning med kontrollerat djup) f\u00f6r att fysiskt ta bort dessa oanv\u00e4nda via-stubbar. Alternativt kan du utnyttja [Tillverkning av HDI-kretskort med valfritt antal lager](\/mastering-any-layer-hdi-pcb-manufacturing) f\u00f6r att anv\u00e4nda blinda mikrovias och helt undvika stubbar.<\/p> <\/li><\/ol><\/div><p>Implementering av avancerade <strong>Tekniker f\u00f6r h\u00f6ghastighetsfr\u00e4sning av kretskort<\/strong> kr\u00e4ver att de fysiska designreglerna f\u00f6ljs noggrant. F\u00f6lj nedanst\u00e5ende steg vid dragning av ledningar till minne eller seriella h\u00f6ghastighetsgr\u00e4nssnitt.<\/p>\n<div style=\"text-align: center;\"><img loading=\"lazy\" decoding=\"async\" src=\"https:\/\/www.topfastpcb.com\/wp-content\/uploads\/2026\/08\/Essential-High-Speed-PCB-Routing-Techniques-2.jpg\" alt=\"Grundl\u00e4ggande tekniker f\u00f6r h\u00f6ghastighetsfr\u00e4sning av kretskort\" width=\"600\" height=\"289\" class=\"aligncenter size-full wp-image-6294\" srcset=\"https:\/\/www.topfastpcb.com\/wp-content\/uploads\/2026\/08\/Essential-High-Speed-PCB-Routing-Techniques-2.jpg 600w, https:\/\/www.topfastpcb.com\/wp-content\/uploads\/2026\/08\/Essential-High-Speed-PCB-Routing-Techniques-2-300x145.jpg 300w, https:\/\/www.topfastpcb.com\/wp-content\/uploads\/2026\/08\/Essential-High-Speed-PCB-Routing-Techniques-2-18x9.jpg 18w\" sizes=\"auto, (max-width: 600px) 100vw, 600px\" \/><\/div>\n<h2><span class=\"ez-toc-section\" id=\"Material_Selection_for_PCIe_50_and_DDR5\"><\/span>Materialval f\u00f6r PCIe 5.0 och DDR5<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Standard-FR4 n\u00e5r sin gr\u00e4ns vid 32 GT\/s. Det g\u00e5r inte att l\u00f6sa med ledningsdragning vad som inte g\u00e5r att l\u00f6sa p\u00e5 grund av fysikens lagar. F\u00f6r PCIe 5.0 och DDR5 m\u00e5ste du uppgradera kretskortets substrat.<\/p>\n<ul>\n<li><strong>Laminat med extremt l\u00e5ga f\u00f6rluster<\/strong>: Ange material som Panasonic Megtron 6, Megtron 7 eller Rogers h\u00f6gfrekvenslaminat. Dessa material har en extremt l\u00e5g f\u00f6rlusttangent (Df &lt; 0,004) och en mycket stabil dielektricitetskonstant \u00f6ver breda frekvensband.<\/li>\n<li><strong>Koppar med extremt l\u00e5g profil (ULP)<\/strong>: F\u00f6r att motverka skineffekten b\u00f6r man anv\u00e4nda helt sl\u00e4ta kopparfolier (ofta kallade HVLP \u2013 Hyper Very Low Profile). Grov koppar fungerar som mikroskopiska farthinder f\u00f6r h\u00f6gfrekventa signaler.<\/li>\n<\/ul>\n<p>Om din konstruktion dessutom kr\u00e4ver dynamisk mekanisk flexibilitet blir det \u00e4nnu mer komplicerat att s\u00e4kerst\u00e4lla signalintegriteten. Ta del av v\u00e5ra insikter om <a href=\"\/sv\/blog\/navigating-rigid-flex-pcb-design-rules\/\">Att navigera bland designreglerna f\u00f6r styv-flex-kretskort<\/a> f\u00f6r att f\u00f6rst\u00e5 hur polyimid p\u00e5verkar impedansen.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"Understanding_the_Eye_Diagram\"><\/span>Att f\u00f6rst\u00e5 \u00f6gondiagrammet<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>N\u00e4r ingenj\u00f6rer utv\u00e4rderar h\u00f6ghastighets-SI tittar de p\u00e5 \u201d\u00f6gondiagrammet\u201d. Ett \u00f6ppet \u00f6ga indikerar en sund signal med tydlig \u00e5tskillnad mellan 1:or och 0:or samt gott om tidsmarginal. Ett \u201dst\u00e4ngt \u00f6ga\u201d inneb\u00e4r att jitter och d\u00e4mpning har f\u00f6rst\u00f6rt signalen. Att till\u00e4mpa ovanst\u00e5ende tekniker \u2013 s\u00e4rskilt att minimera f\u00f6rluster och \u00f6verh\u00f6rning \u2013 \u00e4r det enda s\u00e4ttet att h\u00e5lla \u00f6gat \u00f6ppet vid PCIe 5.0-hastigheter.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"Frequently_Asked_Questions_FAQ\"><\/span>Ofta st\u00e4llda fr\u00e5gor (FAQ)<span class=\"ez-toc-section-end\"><\/span><\/h2><div class=\"schema-faq wp-block-yoast-faq-block\"><div class=\"schema-faq-section\" id=\"faq-question-1\"><strong class=\"schema-faq-question\">Varf\u00f6r \u00e4r det sv\u00e5rare att utforma ledningsdragningen f\u00f6r DDR5 \u00e4n f\u00f6r DDR4?<\/strong> <p class=\"schema-faq-answer\">DDR5 arbetar med betydligt h\u00f6gre datahastigheter och anv\u00e4nder en annan arkitektur, med tv\u00e5 oberoende 32-bitarskanaler per DIMM. Det kr\u00e4ver mycket noggrannare l\u00e4ngdanpassning, str\u00e4ngare impedanskontroll och h\u00f6goptimerade str\u00f6mf\u00f6rs\u00f6rjningsn\u00e4tverk (PDN) direkt p\u00e5 moderkortet f\u00f6r att st\u00f6dja den inbyggda PMIC-kretsen.<\/p> <\/div> <div class=\"schema-faq-section\" id=\"faq-question-2\"><strong class=\"schema-faq-question\">Vad \u00e4r den maximala ledningsl\u00e4ngden f\u00f6r en PCIe 5.0-signal?<\/strong> <p class=\"schema-faq-answer\">Utan aktiv signalbearbetning (som retimers eller redrivers) \u00e4r PCIe 5.0-signalerna extremt k\u00e4nsliga f\u00f6r signalf\u00f6rluster. Beroende p\u00e5 vilket material kretskortet \u00e4r tillverkat av ligger den absoluta maximala ledningsl\u00e4ngden innan signalen f\u00f6rs\u00e4mras s\u00e5 pass att den inte l\u00e4ngre g\u00e5r att \u00e5terst\u00e4lla vanligtvis mellan 5 och 8 tum.<\/p> <\/div> <div class=\"schema-faq-section\" id=\"faq-question-3\"><strong class=\"schema-faq-question\">Beh\u00f6ver jag verkligen droppformade genomg\u00e5ngsh\u00e5l p\u00e5 h\u00f6ghastighets-vias?<\/strong> <p class=\"schema-faq-answer\">Ja. Teardrops skapar en j\u00e4mn \u00f6verg\u00e5ng av koppar fr\u00e5n ledningen till via-kontaktytan. Detta minskar risken f\u00f6r att borret ska g\u00e5 s\u00f6nder under tillverkningen och f\u00f6rhindrar en pl\u00f6tslig impedansavbrott vid via-anslutningen.<\/p> <\/div> <\/div><h2><span class=\"ez-toc-section\" id=\"Conclusion\"><\/span>Slutsats<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>I takt med att vi g\u00e5r in i PCIe 5.0- och DDR5-eran har utrymmet f\u00f6r fel i kretskortskonstruktionen f\u00f6rsvunnit. Att bem\u00e4stra <strong>Tekniker f\u00f6r h\u00f6ghastighetsfr\u00e4sning av kretskort<\/strong> \u00e4r inte l\u00e4ngre valfritt \u2013 det \u00e4r en obligatorisk f\u00f6ruts\u00e4ttning f\u00f6r modern elektronik. Genom att till\u00e4mpa strikt impedanskontroll, anv\u00e4nda material med extremt l\u00e5ga f\u00f6rluster, eliminera via-stubbar och noggrant skydda returv\u00e4garna kan du s\u00e4kerst\u00e4lla att din h\u00e5rdvara uppn\u00e5r maximal bandbredd utan att drabbas av signalf\u00f6rs\u00e4mring.<\/p>","protected":false},"excerpt":{"rendered":"<p>Explore essential high-speed PCB routing techniques for improving signal integrity and reducing design risks. This article covers impedance control, differential pair routing, return path optimization, length matching, via management, and other key PCB layout strategies for high-speed applications.<\/p>","protected":false},"author":1,"featured_media":6295,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_yoast_wpseo_focuskw":"high speed PCB routing techniques","_yoast_wpseo_title":"Essential High-Speed PCB Routing Techniques for Better Signal Integrity","_yoast_wpseo_metadesc":"essential high-speed PCB routing techniques, including impedance control, differential pair routing, length matching, and crosstalk reduction for reliable signal integrity.","footnotes":""},"categories":[108],"tags":[499,502,497,501,498,500],"class_list":["post-6045","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-news","tag-ddr5","tag-eye-diagram","tag-high-speed-pcb-2","tag-pcb-routing","tag-pcie-5-0","tag-signal-integrity"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v25.1 - https:\/\/yoast.com\/wordpress\/plugins\/seo\/ -->\n<title>Essential High-Speed PCB Routing Techniques for Better Signal Integrity<\/title>\n<meta name=\"description\" content=\"essential high-speed PCB routing techniques, including impedance control, differential pair routing, length matching, and crosstalk reduction for reliable signal integrity.\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.topfastpcb.com\/sv\/blog\/essential-high-speed-pcb-routing-techniques\/\" \/>\n<meta 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PCB Routing Techniques for PCIe 5.0 and DDR5\",\"datePublished\":\"2026-08-05T01:00:00+00:00\",\"mainEntityOfPage\":{\"@id\":\"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/\"},\"wordCount\":1132,\"publisher\":{\"@id\":\"https:\/\/www.topfastpcb.com\/#organization\"},\"image\":{\"@id\":\"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/#primaryimage\"},\"thumbnailUrl\":\"https:\/\/www.topfastpcb.com\/wp-content\/uploads\/2026\/08\/Essential-High-Speed-PCB-Routing-Techniques-3.jpg\",\"keywords\":[\"DDR5\",\"Eye Diagram\",\"High Speed PCB\",\"PCB Routing\",\"PCIe 5.0\",\"Signal Integrity\"],\"articleSection\":[\"News\"],\"inLanguage\":\"sv-SE\"},{\"@type\":[\"WebPage\",\"FAQPage\"],\"@id\":\"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/\",\"url\":\"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/\",\"name\":\"Essential High-Speed PCB Routing Techniques for Better Signal Integrity\",\"isPartOf\":{\"@id\":\"https:\/\/www.topfastpcb.com\/#website\"},\"primaryImageOfPage\":{\"@id\":\"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/#primaryimage\"},\"image\":{\"@id\":\"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/#primaryimage\"},\"thumbnailUrl\":\"https:\/\/www.topfastpcb.com\/wp-content\/uploads\/2026\/08\/Essential-High-Speed-PCB-Routing-Techniques-3.jpg\",\"datePublished\":\"2026-08-05T01:00:00+00:00\",\"description\":\"essential high-speed PCB routing techniques, including impedance control, differential pair routing, length matching, and crosstalk reduction for reliable signal integrity.\",\"breadcrumb\":{\"@id\":\"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/#breadcrumb\"},\"inLanguage\":\"sv-SE\",\"potentialAction\":[{\"@type\":\"ReadAction\",\"target\":[\"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/\"]}]},{\"@type\":\"ImageObject\",\"inLanguage\":\"sv-SE\",\"@id\":\"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/#primaryimage\",\"url\":\"https:\/\/www.topfastpcb.com\/wp-content\/uploads\/2026\/08\/Essential-High-Speed-PCB-Routing-Techniques-3.jpg\",\"contentUrl\":\"https:\/\/www.topfastpcb.com\/wp-content\/uploads\/2026\/08\/Essential-High-Speed-PCB-Routing-Techniques-3.jpg\",\"width\":600,\"height\":327,\"caption\":\"Essential High Speed PCB Routing Techniques\"},{\"@type\":\"BreadcrumbList\",\"@id\":\"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/#breadcrumb\",\"itemListElement\":[{\"@type\":\"ListItem\",\"position\":1,\"name\":\"\u9996\u9875\",\"item\":\"https:\/\/www.topfastpcb.com\/\"},{\"@type\":\"ListItem\",\"position\":2,\"name\":\"Essential High Speed PCB Routing Techniques for PCIe 5.0 and DDR5\"}]},{\"@type\":\"WebSite\",\"@id\":\"https:\/\/www.topfastpcb.com\/#website\",\"url\":\"https:\/\/www.topfastpcb.com\/\",\"name\":\"Topfastpcb\",\"description\":\"Topfast Prime Choice for Global Electronics Manufacturing\",\"publisher\":{\"@id\":\"https:\/\/www.topfastpcb.com\/#organization\"},\"potentialAction\":[{\"@type\":\"SearchAction\",\"target\":{\"@type\":\"EntryPoint\",\"urlTemplate\":\"https:\/\/www.topfastpcb.com\/?s={search_term_string}\"},\"query-input\":{\"@type\":\"PropertyValueSpecification\",\"valueRequired\":true,\"valueName\":\"search_term_string\"}}],\"inLanguage\":\"sv-SE\"},{\"@type\":\"Organization\",\"@id\":\"https:\/\/www.topfastpcb.com\/#organization\",\"name\":\"Topfastpcb\",\"url\":\"https:\/\/www.topfastpcb.com\/\",\"logo\":{\"@type\":\"ImageObject\",\"inLanguage\":\"sv-SE\",\"@id\":\"https:\/\/www.topfastpcb.com\/#\/schema\/logo\/image\/\",\"url\":\"https:\/\/www.topfastpcb.com\/wp-content\/uploads\/2026\/02\/cropped-topfast-logo.png\",\"contentUrl\":\"https:\/\/www.topfastpcb.com\/wp-content\/uploads\/2026\/02\/cropped-topfast-logo.png\",\"width\":144,\"height\":56,\"caption\":\"Topfastpcb\"},\"image\":{\"@id\":\"https:\/\/www.topfastpcb.com\/#\/schema\/logo\/image\/\"}},{\"@type\":\"Person\",\"@id\":\"https:\/\/www.topfastpcb.com\/#\/schema\/person\/39870874f1c329f3cd3693593dbdce3a\",\"name\":\"\u6258\u666e\u6cd5\u65af\u7279\",\"sameAs\":[\"http:\/\/www.topfastpcb.com\"],\"url\":\"https:\/\/www.topfastpcb.com\/sv\/blog\/author\/admin\/\"},{\"@type\":\"HowTo\",\"@id\":\"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/#howto-1\",\"name\":\"Essential High Speed PCB Routing Techniques for PCIe 5.0 and DDR5\",\"mainEntityOfPage\":{\"@id\":\"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/#article\"},\"description\":\"\",\"step\":[{\"@type\":\"HowToStep\",\"url\":\"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/#how-to-step-3\",\"name\":\"Choose Between Microstrip and Stripline\",\"itemListElement\":[{\"@type\":\"HowToDirection\",\"text\":\"Microstrip (Surface Layers): Faster propagation speed, but higher radiation and crosstalk susceptibility. Suitable for shorter runs.<br\/>Stripline (Internal Layers): The trace is sandwiched between two ground\/power planes. Offers excellent EMI shielding and lower crosstalk. For multi-gigabit signals like PCIe 5.0, internal stripline routing is highly recommended.\"}]},{\"@type\":\"HowToStep\",\"url\":\"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/#how-to-step-4\",\"name\":\"Choose Between Microstrip and Stripline\",\"itemListElement\":[{\"@type\":\"HowToDirection\",\"text\":\"Microstrip (Surface Layers): Faster propagation speed, but higher radiation and crosstalk susceptibility. Suitable for shorter runs.<br\/>Stripline (Internal Layers): The trace is sandwiched between two ground\/power planes. Offers excellent EMI shielding and lower crosstalk. For multi-gigabit signals like PCIe 5.0, internal stripline routing is highly recommended.\"}]},{\"@type\":\"HowToStep\",\"url\":\"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/#how-to-step-5\",\"name\":\"Choose Between Microstrip and Stripline\",\"itemListElement\":[{\"@type\":\"HowToDirection\",\"text\":\"Microstrip (Surface Layers): Faster propagation speed, but higher radiation and crosstalk susceptibility. Suitable for shorter runs.<br\/>Stripline (Internal Layers): The trace is sandwiched between two ground\/power planes. Offers excellent EMI shielding and lower crosstalk. For multi-gigabit signals like PCIe 5.0, internal stripline routing is highly recommended.\"}]},{\"@type\":\"HowToStep\",\"url\":\"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/#how-to-step-6\",\"name\":\"Manage Via Stubs via Backdrilling\",\"itemListElement\":[{\"@type\":\"HowToDirection\",\"text\":\"When a signal transitions from layer 1 to layer 3 on a 10-layer board, the remaining copper barrel from layer 3 to layer 10 acts as an antenna. This creates a resonant stub that utterly destroys multi-gigabit signals by creating deep notches in the frequency response. You must specify <strong>backdrilling<\/strong> (controlled depth drilling) to physically remove these unused via stubs. Alternatively, leverage [Any Layer HDI PCB Manufacturing](\/mastering-any-layer-hdi-pcb-manufacturing) to use blind microvias and avoid stubs altogether.\"}]}],\"inLanguage\":\"sv-SE\"}]}<\/script>\n<!-- \/ Yoast SEO plugin. -->","yoast_head_json":{"title":"Essential High-Speed PCB Routing Techniques for Better Signal Integrity","description":"essential high-speed PCB routing techniques, including impedance control, differential pair routing, length matching, and crosstalk reduction for reliable signal integrity.","robots":{"index":"index","follow":"follow","max-snippet":"max-snippet:-1","max-image-preview":"max-image-preview:large","max-video-preview":"max-video-preview:-1"},"canonical":"https:\/\/www.topfastpcb.com\/sv\/blog\/essential-high-speed-pcb-routing-techniques\/","og_locale":"sv_SE","og_type":"article","og_title":"Essential High-Speed PCB Routing Techniques for Better Signal Integrity","og_description":"essential high-speed PCB routing techniques, including impedance control, differential pair routing, length matching, and crosstalk reduction for reliable signal integrity.","og_url":"https:\/\/www.topfastpcb.com\/sv\/blog\/essential-high-speed-pcb-routing-techniques\/","og_site_name":"Topfastpcb","article_published_time":"2026-08-05T01:00:00+00:00","og_image":[{"width":600,"height":327,"url":"https:\/\/www.topfastpcb.com\/wp-content\/uploads\/2026\/08\/Essential-High-Speed-PCB-Routing-Techniques-3.jpg","type":"image\/jpeg"}],"author":"\u6258\u666e\u6cd5\u65af\u7279","twitter_card":"summary_large_image","twitter_misc":{"Skriven av":"\u6258\u666e\u6cd5\u65af\u7279","Ber\u00e4knad l\u00e4stid":"6 minuter"},"schema":{"@context":"https:\/\/schema.org","@graph":[{"@type":"Article","@id":"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/#article","isPartOf":{"@id":"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/"},"author":{"name":"\u6258\u666e\u6cd5\u65af\u7279","@id":"https:\/\/www.topfastpcb.com\/#\/schema\/person\/39870874f1c329f3cd3693593dbdce3a"},"headline":"Essential High Speed PCB Routing Techniques for PCIe 5.0 and DDR5","datePublished":"2026-08-05T01:00:00+00:00","mainEntityOfPage":{"@id":"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/"},"wordCount":1132,"publisher":{"@id":"https:\/\/www.topfastpcb.com\/#organization"},"image":{"@id":"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/#primaryimage"},"thumbnailUrl":"https:\/\/www.topfastpcb.com\/wp-content\/uploads\/2026\/08\/Essential-High-Speed-PCB-Routing-Techniques-3.jpg","keywords":["DDR5","Eye Diagram","High Speed PCB","PCB Routing","PCIe 5.0","Signal Integrity"],"articleSection":["News"],"inLanguage":"sv-SE"},{"@type":["WebPage","FAQPage"],"@id":"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/","url":"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/","name":"Essential High-Speed PCB Routing Techniques for Better Signal Integrity","isPartOf":{"@id":"https:\/\/www.topfastpcb.com\/#website"},"primaryImageOfPage":{"@id":"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/#primaryimage"},"image":{"@id":"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/#primaryimage"},"thumbnailUrl":"https:\/\/www.topfastpcb.com\/wp-content\/uploads\/2026\/08\/Essential-High-Speed-PCB-Routing-Techniques-3.jpg","datePublished":"2026-08-05T01:00:00+00:00","description":"essential high-speed PCB routing techniques, including impedance control, differential pair routing, length matching, and crosstalk reduction for reliable signal integrity.","breadcrumb":{"@id":"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/#breadcrumb"},"inLanguage":"sv-SE","potentialAction":[{"@type":"ReadAction","target":["https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/"]}]},{"@type":"ImageObject","inLanguage":"sv-SE","@id":"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/#primaryimage","url":"https:\/\/www.topfastpcb.com\/wp-content\/uploads\/2026\/08\/Essential-High-Speed-PCB-Routing-Techniques-3.jpg","contentUrl":"https:\/\/www.topfastpcb.com\/wp-content\/uploads\/2026\/08\/Essential-High-Speed-PCB-Routing-Techniques-3.jpg","width":600,"height":327,"caption":"Essential High Speed PCB Routing Techniques"},{"@type":"BreadcrumbList","@id":"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/#breadcrumb","itemListElement":[{"@type":"ListItem","position":1,"name":"\u9996\u9875","item":"https:\/\/www.topfastpcb.com\/"},{"@type":"ListItem","position":2,"name":"Essential High Speed PCB Routing Techniques for PCIe 5.0 and DDR5"}]},{"@type":"WebSite","@id":"https:\/\/www.topfastpcb.com\/#website","url":"https:\/\/www.topfastpcb.com\/","name":"Topfastpcb","description":"Topfast Prime Choice for Global Electronics Manufacturing","publisher":{"@id":"https:\/\/www.topfastpcb.com\/#organization"},"potentialAction":[{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https:\/\/www.topfastpcb.com\/?s={search_term_string}"},"query-input":{"@type":"PropertyValueSpecification","valueRequired":true,"valueName":"search_term_string"}}],"inLanguage":"sv-SE"},{"@type":"Organization","@id":"https:\/\/www.topfastpcb.com\/#organization","name":"Topfastpcb","url":"https:\/\/www.topfastpcb.com\/","logo":{"@type":"ImageObject","inLanguage":"sv-SE","@id":"https:\/\/www.topfastpcb.com\/#\/schema\/logo\/image\/","url":"https:\/\/www.topfastpcb.com\/wp-content\/uploads\/2026\/02\/cropped-topfast-logo.png","contentUrl":"https:\/\/www.topfastpcb.com\/wp-content\/uploads\/2026\/02\/cropped-topfast-logo.png","width":144,"height":56,"caption":"Topfastpcb"},"image":{"@id":"https:\/\/www.topfastpcb.com\/#\/schema\/logo\/image\/"}},{"@type":"Person","@id":"https:\/\/www.topfastpcb.com\/#\/schema\/person\/39870874f1c329f3cd3693593dbdce3a","name":"\u6258\u666e\u6cd5\u65af\u7279","sameAs":["http:\/\/www.topfastpcb.com"],"url":"https:\/\/www.topfastpcb.com\/sv\/blog\/author\/admin\/"},{"@type":"HowTo","@id":"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/#howto-1","name":"Essential High Speed PCB Routing Techniques for PCIe 5.0 and DDR5","mainEntityOfPage":{"@id":"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/#article"},"description":"","step":[{"@type":"HowToStep","url":"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/#how-to-step-3","name":"Choose Between Microstrip and Stripline","itemListElement":[{"@type":"HowToDirection","text":"Microstrip (Surface Layers): Faster propagation speed, but higher radiation and crosstalk susceptibility. Suitable for shorter runs.<br\/>Stripline (Internal Layers): The trace is sandwiched between two ground\/power planes. Offers excellent EMI shielding and lower crosstalk. For multi-gigabit signals like PCIe 5.0, internal stripline routing is highly recommended."}]},{"@type":"HowToStep","url":"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/#how-to-step-4","name":"Choose Between Microstrip and Stripline","itemListElement":[{"@type":"HowToDirection","text":"Microstrip (Surface Layers): Faster propagation speed, but higher radiation and crosstalk susceptibility. Suitable for shorter runs.<br\/>Stripline (Internal Layers): The trace is sandwiched between two ground\/power planes. Offers excellent EMI shielding and lower crosstalk. For multi-gigabit signals like PCIe 5.0, internal stripline routing is highly recommended."}]},{"@type":"HowToStep","url":"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/#how-to-step-5","name":"Choose Between Microstrip and Stripline","itemListElement":[{"@type":"HowToDirection","text":"Microstrip (Surface Layers): Faster propagation speed, but higher radiation and crosstalk susceptibility. Suitable for shorter runs.<br\/>Stripline (Internal Layers): The trace is sandwiched between two ground\/power planes. Offers excellent EMI shielding and lower crosstalk. For multi-gigabit signals like PCIe 5.0, internal stripline routing is highly recommended."}]},{"@type":"HowToStep","url":"https:\/\/www.topfastpcb.com\/blog\/essential-high-speed-pcb-routing-techniques\/#how-to-step-6","name":"Manage Via Stubs via Backdrilling","itemListElement":[{"@type":"HowToDirection","text":"When a signal transitions from layer 1 to layer 3 on a 10-layer board, the remaining copper barrel from layer 3 to layer 10 acts as an antenna. This creates a resonant stub that utterly destroys multi-gigabit signals by creating deep notches in the frequency response. You must specify <strong>backdrilling<\/strong> (controlled depth drilling) to physically remove these unused via stubs. Alternatively, leverage [Any Layer HDI PCB Manufacturing](\/mastering-any-layer-hdi-pcb-manufacturing) to use blind microvias and avoid stubs altogether."}]}],"inLanguage":"sv-SE"}]}},"_links":{"self":[{"href":"https:\/\/www.topfastpcb.com\/sv\/wp-json\/wp\/v2\/posts\/6045","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.topfastpcb.com\/sv\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.topfastpcb.com\/sv\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.topfastpcb.com\/sv\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/www.topfastpcb.com\/sv\/wp-json\/wp\/v2\/comments?post=6045"}],"version-history":[{"count":13,"href":"https:\/\/www.topfastpcb.com\/sv\/wp-json\/wp\/v2\/posts\/6045\/revisions"}],"predecessor-version":[{"id":6392,"href":"https:\/\/www.topfastpcb.com\/sv\/wp-json\/wp\/v2\/posts\/6045\/revisions\/6392"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.topfastpcb.com\/sv\/wp-json\/wp\/v2\/media\/6295"}],"wp:attachment":[{"href":"https:\/\/www.topfastpcb.com\/sv\/wp-json\/wp\/v2\/media?parent=6045"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.topfastpcb.com\/sv\/wp-json\/wp\/v2\/categories?post=6045"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.topfastpcb.com\/sv\/wp-json\/wp\/v2\/tags?post=6045"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}